Towards Fault-Tolerant Quantum Computing Fujitsu Introduces New Computing Architecture

On March 23, Fujitsu and Osaka University's Center for Quantum Information and Quantum Biology jointly announced a new and efficient architecture for simulated rotational quantum computing.

The new architecture can reduce the number of physical quantum bits required for quantum error correction by 90%. This means that only 10,000 physical quantum bits and 64 logical quantum bits are needed to build an early fault-tolerant quantum computer (FTQC) with 100,000 times the peak performance of traditional high-performance computers. This architecture has accelerated the implementation of fault-tolerant quantum computers.

The difference between bits in classical computers and quantum bits is that classical computers need eight bits to represent numbers between 0 and 255. With eight quantum bits, on the other hand, a quantum computer can not only represent every number between 0 and 255, but can do so simultaneously. It's hard to understand, but it's true.

However, the quantum bits in a quantum computer act as both computational units and memory, and since they cannot replicate quantum information, they cannot be stored in memory like a classical computer. Therefore all quantum bits in a quantum computer must be able to interact with each other.

At the same time, the operation inside quantum bits is unstable and very sensitive; they require vacuum and temperatures very close to absolute zero to operate properly and not tolerate interference. Interference becomes very complicated when operating with individual photons and electrons on the nanoscale.

Logical quantum bits composed of multiple physical quantum bits play an important and critical role in the realization of practical quantum computers capable of providing fault-tolerant results.

In traditional quantum computing architectures, computations are performed using a combination of four error-correcting universal quantum gates (CNOT, H, S and T gates). In these architectures, in particular, quantum error correction of T-gates requires a large number of physical quantum bits; for example, the rotation of a state vector in quantum computing requires an average of about 50 repetitions of logical T-gate operations. Thus, the implementation of a truly fault-tolerant quantum computer is estimated to require more than one million physical quantum bits in total.

For this reason, early fault-tolerant quantum computers using conventional architectures for quantum error correction can only perform computations at a very limited scale, even below that of classical computers, when they have 10,000 physical quantum bits.

To address these problems, Fujitsu and Osaka University have developed a new efficient analog rotational quantum computing architecture that can significantly reduce the number of physical quantum bits required for quantum error correction, enabling quantum computers with even 10,000 physical quantum bits to significantly outperform current classical computers and accelerate the realization of truly fault-tolerant quantum computers.

By redefining the universal quantum gate set, Fujitsu and Osaka University have successfully implemented the world's first phase-rotation gate, enabling efficient phase rotation, a process that previously required a large number of physical quantum bits and quantum gate operations. In contrast to conventional architectures that require repetitive logic T-gate operations using a large number of physical quantum bits, the gate operations in the new architecture are performed by rotating the phase directly to any specified angle.

In this way, Fujitsu and Osaka University have succeeded in reducing the number of quantum bits required for quantum error correction to about 10% of the existing technology and the number of gate operations required for arbitrary rotation to about 5%. In addition, Fujitsu and Osaka University have suppressed the probability of quantum errors in physical quantum bits to about 13%, thereby enabling high-precision computing.

Diagram of the newly developed quantum computing architecture

The newly developed computing architecture lays the foundation for building a quantum computer with 10,000 physical quantum bits and 64 logical quantum bits, corresponding to a computing performance that is approximately 100,000 times the peak performance of conventional high-performance computers.

About Fujitsu Quantum

Fujitsu, together with some of the world's leading research institutions, is driving R&D on a global scale at all levels of technology, from quantum devices to underlying software and applications: focusing on software technology while pursuing the broad possibilities of hardware; and is using quantum simulators to develop applications with end users from an early stage.

Fujitsu and Osaka University have been conducting joint R&D on quantum error correction technologies at the Fujitsu Quantum Computing Joint Research Department, which includes new quantum computing architectures for the early fault-tolerant quantum computer era. The Division was established on October 1, 2021, on the Osaka University campus as part of Fujitsu's "Fujitsu Small Research Laboratory" program and as a collaborative research institute of the Center for Quantum Information and Quantum Biology at OBU.