Zhejiang University achieves low-loss, fully integrated programmable silicon photonic processor, promising for quantum technology

Recently, the latest article "Low-loss chip-level programmable silicon photonic processors" [1] published in the journal Progress in Photonics by a team from Zhejiang University discusses low-loss chip-level programmable silicon photonic processors.

01Experimental Breakthrough: Fully Integrated Programmable Silicon Photonic Processors

Integrated optical signal processors have been identified as a powerful engine for the optical processing of optical signals. They enable broadband and stable signal processing operations with ultimate control accuracy on a miniaturized chip. There is currently great interest in providing functional reconfigurability to match one of the key advantages of programmable microelectronic processors. In order to realize a large-scale programmable photonic integrated circuit (PIC) with a large number of tuned elements, the challenge is to reduce the losses in the silicon photonic waveguides and to minimize the random phase errors caused by imperfect manufacturing of the phase shifters of these tuned elements.

Therefore, the experimental team proposed a fully integrated programmable silicon photonic processor that incorporates a 1×4 variable power divider based on a Mach-Zehnder coupler (MZC), four photodetectors, and a four-channel tunable delay line with Mach-Zehnder switches (MZS).

(a) Layout of the chip and the basic building blocks. (b) Photograph of the fabricated chip. (c) Photograph of the packaged chip.

02Unique advantages: wide tuning range, resettability, high resolution, and low loss

In this new silicon optical signal processor, for the optical delay line, an ultra-low-loss waveguide helix with a cross-section of 2.0 × 0.22 μm2 is used, while a tapered Eulerian curve S-bend is introduced at the center of the helix to minimize losses and suppress the generation of higher-order modes.

Meanwhile, the width of the phase shifters on the MZS and MZC arms is expanded to 2 μm to achieve low random phase errors due to manufacturing imperfections. For the current silicon photonic processor, the chip area is about 4.9 mm2 and the tunable delay line for each channel has a continuous tuning range of up to 176 ps, while the waveguide propagation loss is about 0.28 dB/cm.

Schematic diagram of the current 2×2 thermo-optical MZS structure, including the widened phase shifter waveguide. (a) Top view. (b) Cross-section of the MZS arm with microheater.

(a) Three-dimensional view of the low-loss waveguide helix. (b) Calculated scattering loss with increasing waveguide core width at 1550 nm.

This new silicon photonic processor chip exhibits a number of unique advantages over existing delay line technologies, including wide tuning range, reconfigurability, high resolution, and low loss. In addition, the chip can be configured for significantly different signal processing functions, including tunable delay, beam steering/forming, arbitrary optical signal filtering, and arbitrary waveform generation.

Comparison of various on-chip microwave photon beamformers

03Paving the way for large-scale, reconfigurable silicon photonic chips with promising applications in quantum technology

This experiment demonstrates a chip-scale programmable silicon photonic processor that includes a cascaded MZC-based 1×4 variable power divider, four Ge/Si photodetectors, and four channels of thermally tunable optical delay lines. And, this programmable silicon photonic processor has been configured for multi-functionality, including tunable delay, microwave photonic beamforming, arbitrary optical signal filtering, and arbitrary waveform generation.

If longer waveguide helixes are introduced to obtain longer time delays, the total loss from the waveguide helixes may be more prominent. For example, to achieve nanosecond time delays, the total length of the waveguide helix is ~10 cm long, in which case the loss is as high as 20-30 dB using conventional silicon photonic waveguides with a loss of 2-3 dB/cm. Therefore, the introduction of low-loss waveguides is crucial when wishing to continue to increase the scale of PICs. On the other hand, all MZCs and MZS are designed with 2 µm wide arm waveguides that require little to no calibration. This design can be easily configured to achieve the desired design functionality with low power consumption.

This work paves the way for realizing large-scale reconfigurable silicon photonic chips because of the high-performance basic building block technology; it also provides evidence for feasible implementation of large-scale silicon photonic chips for more applications, such as quantum photonics, optical computing, lidar, etc.

Reference links：

[1]https://phys.org/news/2022-11-low-loss-chip-scale-programmable-silicon-photonic.html

[2]https://www.oejournal.org//article/doi/10.29026/oea.2023.220030