EKU and SMIT have made an important breakthrough in the field of low-temperature quantum measurement and control chips
In October, our country is immersed in the joy of harvest, and there is good news from the quantum research community. The quantum computing frequency generation chip developed by Professor Wang Cheng's group at the School of Electronic Science and Engineering of the University of Electronic Science and Technology (UESE) and Chengdu Zhongwei Daxin Technology Co. Circuits Conference (ISSCC), which opened a new chapter in the development of low temperature CMOS (Cryo-CMOS, 1-4K temperature range) integrated quantum measurement and control chip in China.
Paper Accepted by ISSCC
Prof. Cheng Wang's team at the University of Electronic Science and Technology (UST) and Chengdu Zhongwei Daxin Technology Co., Ltd. have successfully realized several cryogenic measurement and control chip flows based on standard bulk silicon CMOS process and SiGe BiCMOS process starting from 2021 to 2022. The accepted paper is the core circuit of Cryo-CMOS voltage controlled oscillator, which lays a solid foundation for the subsequent development of independent intellectual property large-scale cryogenic measurement and control array chip.
Zhang Keng Nanyang, a current student of University of Electronic Science and Technology, is the first author of the paper, Prof. Wang Cheng is the corresponding author of the paper, and Dr. Lin Haichuan of Chengdu Zhongwei Daxin Technology Co.
01Quantum computing measurement and control: from room temperature to low temperature
Quantum computing provides the ultimate computing power, which is revolutionary and strategic. In recent years, quantum computing technology represented by superconducting and silicon-based quantum computing systems has flourished. The number of physical bits of superconducting quantum computing has developed from a few quantum bits a few years ago to tens of quantum bits two years ago, and then to hundreds of quantum bits by the current leading international teams, IBM, Google and some domestic superconducting quantum computing research institutions have a clear roadmap of thousands of quantum bits, and humanity is on the way to millions of The human race is on the road to a million quantum bits of universal quantum computing.
One of the major challenges encountered in the process of moving forward is how to achieve a large-scale interconnection between quantum computing measurement and control systems and quantum computing chips working in very low-temperature refrigeration machines and guarantee stable work.
Cryo-CMOS integrated circuits and measurement and control systems can work in the 1~4K extremely low temperature region, thus solving the scalability problem of large-scale physical quantum bits in quantum computing, and realizing the error correction of physical quantum bits according to Surface Code architecture to achieve high fidelity logic quantum gates.
The representative work in this field is Intel's Horse Ridge I low-temperature quantum control chip launched at the end of 2019, which is mainly oriented to the internal electronics and interconnection control of quantum computers to reduce the complexity of this part of the circuit. 2021 Intel also launched a new generation of Horse Ridge II low-temperature quantum control chip, which uses a low-power 22nm FinFET process (22FFL), and has been validated at temperatures as low as 4K. In addition, internationally renowned universities and companies such as Delft University of Technology (TU Delft), Google, University of Massachusetts (UMass), and Pohang University of Science and Technology (POSTECH) have established their own Cryo-CMOS research teams. Due to the importance of this direction for quantum computing, the ISSCC conference has added a session "Session: Cyro-CMOS for Quantum Computing" for the last two years.
Relevant results from foreign teams. Image source: SMIT
The team of Prof. Cheng Wang from University of Electronic Science and Technology (UES), together with Chengdu Zhongwei Daxin Technology Co. The flow of chips.
Three stages of development of quantum computing measurement and control
02Latest breakthrough: suppressing low-temperature scintillation noise
Current quantum computing hardware requires a microwave frequency source with high frequency stability and low synchronization error to achieve excitation and reflection measurement readout for large-scale quantum bit chips. Although the low-temperature environment (1-4K) helps reduce the thermal noise generated by the frequency, the flicker noise of standard bulk silicon CMOS transistors increases significantly at low temperatures, limiting the frequency stability of the low-temperature phase-locked loop. In contrast, the heterojunction bipolar transistor of SiGe BiCMOS process has low flicker noise at low temperature, however, its mixed signal integration is lower than CMOS, which is not conducive to large-scale measurement and control system integration. The accepted paper is a Cryo-CMOS voltage-controlled oscillator core circuit, which is based on accurate low-temperature device modeling and achieves simultaneous focusing of broadband second double resonance peaks and narrowband third resonance peaks by constructing balanced low-coupling common-mode resonators for low-temperature flicker noise suppression. The measured results show that it achieves the best Figure-of-the-Merit (FoM) 202dBc/Hz reported in the current open literature on a standard 65nm CMOS process.
This ISSCC accepted paper opens a new chapter in the development of domestic cryogenic Cryo-CMOS quantum measurement and control ICs, and lays a solid foundation for the development of subsequent large-scale cryogenic measurement and control array chips with independent intellectual property rights.
Cryogenic CMOS measurement and control array chip for kilobit scale. Image credit: SMIT
About ISSCC International Solid-State Circuits Conference
The International Solid-State Circuits Conference (ISSCC) was started in 1953 under the auspices of the Institute of Electrical and Electronics Engineering (IEEE) Solid-State Circuits Society, and is the highest level academic conference in the world of integrated circuit design. The International Solid-State Circuits Conference (ISSCC) was started in 1953 under the auspices of the IEEE Solid-State Circuits Society.
The ISSCC conference is held once a year, and most of the papers accepted are heavyweight and forward-looking technical papers in various subdivisions of ICs, and the number of accepted papers is strict and small, for example, a total of 200 papers were accepted worldwide in 2022.
According to ISSCC statistics, in 2013, 73 papers were selected from the United States, followed by 30 from Japan, 22 from Korea, 19 from Taiwan, and only 6 from mainland China. In recent years, with the development of China's semiconductor and integrated circuit technology, China's accepted papers continue to grow and gradually squeeze into the first echelon. 2021, the U.S. was selected for 75 ISSCC-related papers, followed by 30 from South Korea in second place and 22 from mainland China in third place, surpassing Japan's 12 and Taiwan's 12. Among the 200 papers worldwide in 2022, the U.S. had 69 papers The United States was selected, the lowest since 2015, but still the country with the largest number of papers selected, followed by South Korea with 41 papers accepted, mainland China, Hong Kong and Macau with 30 papers in third place, Taiwan, China with 15 papers, and Japan with only 7 papers selected.
