With new design, France expects to achieve 1 million qubits by 2024.

The French Commission for Atomic and Alternative Energies (CEA) and French quantum computing startup C12 Quantum Electronics have announced a new quantum computer design. Using CMOS fabrication technology and backed by CEA funding of $5 billion a year, carbon nanotube-based qubits are fabricated at scale — 200mm (7.9in) wafers at a time.

There are a few other quantum computing designs that aim to get close to transistor fabrication in some way. The idea is that the more compatible qubit fabrication is with existing silicon-targeted processes, such as TSMC's 4nm or Intel's 7nm, the more efficient and scalable they will be to fabricate.

But none of the designs shown are for the full 200mm wafer scale. It's telling that in the $599.9 billion semiconductor market, only Cerebras can make wafer-level chips.

The difficulties of this design are enormous, but C12 expects to have a working final wafer-level prototype by 2024.

"Quantum technologies offer great promise for next-generation computing, but significant developmental challenges remain in making qubit chips. Combining proven CMOS technology with C12's original approach using carbon nanotubes could accelerate quantum computing commercialization and The process of making these chips at scale," said Sébastien Dauvé, CEO of the CEA-Leti laboratory.

The first multi-qubit chip produced by C12 nanofabrication engineers Gulibusitan Abulizi and Jeanne Becdelievre with CEA.

C12 is confident: its technology makes fabrication easier (relative to more exotic quantum computing methods), approaches semiconductor devices, and will allow for a "scalable and supercoherent quantum computing platform".The ultimate goal, says C12 CEO and co-founder Pierre Desjardins, is to "transform an academic-grade manufacturing process into an industrial-grade semiconductor manufacturing process".

The company says they can make thousands of qubits per hour, eventually reaching a density of "hundreds of thousands" of qubits per wafer-sized quantum computing chip. The company's original design goal was to focus on delivering one-million-qubit quantum computers. Maybe it doesn't need to be implemented in a single wafer eventually.

C12's qubit design begins with the growth of ultrapure carbon nanotubes, which are performed in its facility to guarantee its purity level. Then, through chemical vapor deposition, the C12 isotopes of carbon are carefully placed atom by atom, forming nanotube structures.

Growth of carbon nanotubes

The growth of ultrapure carbon nanotubes is inevitable because the presence of any other isotopes (or atomic particles) in the nanotubes causes them to interact. This in turn increases the dreaded "spin noise" - one of the main sources of interference within quantum machines that can cause qubits to completely collapse, causing computational errors or interrupting workloads. So before they used the nanotubes, they screened them non-invasively for impurities.

Only those that are 99% pure (meaning they contain 99% of the C12 carbon isotope) go to the next step.

The carbon nanotubes are then placed on integrated circuit chips that are already mass produced by semiconductor manufacturing. The carbon nanotube layer is suspended above the gate electrode array, ensuring optimized environmental isolation, "substantially reducing decoherence caused by charge and mechanical noise".

A new microwave-based modulator allows random coupling between the qubits of a system. At the same time, it improves performance and reduces environmental interference with qubit state changes.

Integrating ultrapure carbon nanotubes onto silicon chips to form quantum circuits

The hybrid quantum architecture of C12 combines spins that ensure long coherence times with high-frequency microwave components that enable fast operation. The gate electrode allows the capture of single electrons in double quantum dots in a single carbon nanotube.

In the first step, the gate electrode is used to form double quantum dots inside the carbon nanotubes, in which individual electrons are trapped. This is the basis for its qubits.

The second step, using magnetic grid electrodes, adds a magnetic texture to the double quantum dots that entangles the electron spins with the charge dipoles. This creates spin qubits.

In the final step, the spin qubits are addressed through the resonator using microwave pulses. Gates can also be implemented using control electrodes.

Two-qubit gates are realized by virtual photon exchange with the resonator and spin coupling between the two qubits.

Qubit manipulation

Given the amount of inspiration the semiconductor industry already has, that two wafer-scale computing chips could be scaled with networking solutions (perhaps photonic-based) sounds like the next path of least resistance.

IBM has previously said chips will reach a density of one million qubits by 2030. With the million-qubit prototypes of the CEA and C12 expected to roll out in 2024, they are expected to be contenders for quantum computing dominance. But the performance of a quantum computer system depends on many metrics, and other companies (like the incredibly wealthy Microsoft) are certainly competing.