Mass production is expected! Intel uses process line to make qubits
Google, IBM, Intel, Quantinuum and Silicon Quantum Computing Corporation (SQC)/University of New South Wales (UNSW) showcased the race to achieve practical quantum computing at this year's Quantum Industry Conference at the American Physical Society (APS) March Annual Meeting progress and ongoing challenges. Among them, Intel highlighted its ability to manufacture silicon-based qubits using its semiconductor process lines.
The core idea behind Intel's foray into quantum computing is that leveraging its extensive CMOS manufacturing expertise will allow it to scale faster. Intel quantum hardware engineer Otto Zeitz said at the conference: "You know, Intel ships more than 800 trillion transistors a year. By 2025, the number of transistors on earth is expected to exceed the number of human cells. A large number of devices are made and then delivered. To society. It turns out that Intel silicon spin qubit devices are very similar to these transistors.”
Intel's quantum computing team presented as many as 14 papers at the conference, which showed that Intel has begun to manufacture qubits on semiconductor process lines.
To pave the way for large-scale quantum computing, millions of high-yield, identical-sized qubits are needed. For classical processors, these conditions are achieved by using advanced fabrication techniques such as optical lithography and chemical mechanical polishing. Because of their similarity to transistors, silicon spin qubits are generally considered to be able to take advantage of decades of technological development in the semiconductor industry.
However, the methods used in process lines are less flexible and more invasive than those currently used for quantum dot fabrication. It is therefore an open question whether these techniques allow the fabrication of quantum dot structures, and whether industrial processing conditions that ensure high-yield transistor fabrication do not compromise qubit quality and coherence.
In the article "Qubits for Advanced Semiconductor Fabrication" [1], Intel describes their fabrication of quantum dot devices with isotope-enriched 28Si-MOS, fabricated on a standard 300mm process line. These devices are fabricated entirely using photolithography and chemical mechanical polishing techniques, compatible with state-of-the-art industrial manufacturing techniques. This enables extremely high throughput and sample uniformity on 300mm wafers. Furthermore, the samples exhibit well-controlled single and double quantum dot behaviors in a multi-electron regime. We perform charge sensing with a sufficiently high signal-to-noise ratio for a single readout and form qubits in a one-electron regime with spin-coherent properties comparable to those reported in the literature. This work highlights the potential of spin qubit scalability.
Intel was the first to manufacture SiMOS and Si/SiGe quantum dot devices on a 300mm all-optical process line, and successfully produced qubits. But the ability to execute two-qubit logic gates on qubits fabricated on these process lines has not yet been realized. So in the paper "Two-qubit logic gates for advanced semiconductor fabrication" [2], Intel reports a demonstration of two-qubit gates on Si/SiGe quantum dot devices fabricated with 300mm EUV technology.
Spin qubits consist of one electron in a quantum dot. Single-qubit gates are realized by EDSR, with nearby micromagnetism providing the necessary artificial spin-orbit coupling as well as qubit frequency separation. Fast voltage pulses are used to control the exchange coupling between two qubits, enabling the realization of various types of two-qubit gates.
Furthermore, while Intel is able to generate 10,000 devices per wafer, unlike traditional large-scale CMOS R&D, there is no corresponding high-throughput electrical test ecosystem for quantum computing. The large number of devices, including quantum dot arrays for qubit formation and auxiliary devices for process monitoring and device physical characterization, coupled with the increased complexity of CMOS processing schemes, requires innovation in high-throughput cryogenic characterization equipment and techniques .
To that end, Intel partnered with Bluefors to develop a cryogenic wafer probe capable of characterizing devices at 1K, enabling the rapid collection of statistically significant data for conventional transistors and quantum dots. Intel presented at the conference the utility of these 1K high-throughput characterization techniques for manufacturing process optimization and yield enhancement, as well as optimal device selection for spin qubit formation in a 20mK dilution refrigerator.
In addition to the fabrication and testing of qubits, qubit control technology is also critical. The electrons whose spin states are used as qubit states are all the same, but the environment around them is different. Therefore, precise calibration of the control qubit signal is required. In addition, spin qubits require multiple voltage control lines per qubit, plus possibly shared microwave control lines. In the paper "High-Fidelity Single-Spin Qubit Control Using Intel-Developed AWGs" [3], Intel describes the control and calibration software developed in-house. It can generate hardware-independent pulse trains that are interpreted by the control electronics. In particular, Intel demonstrated that an in-house developed arbitrary waveform generator (AWG) is a useful tool for coherent qubit control. They took advantage of the AWG's high instruction bandwidth (upload speed), coupled with its large memory, to achieve a single-qubit random benchmark fidelity of nearly 99.9 percent in native silicon samples.
In conclusion, from the fabrication, testing and control of silicon-based qubits to the implementation of two-qubit gates, Intel has paved the way for the eventual mass production of qubits on semiconductor process lines.
Link:
[1] https://meetings.aps.org/Meeting/MAR22/Session/Y36.4
[2] https://meetings.aps.org/Meeting/MAR22/Session/B39.4
[3] https://meetings.aps.org/Meeting/MAR22/Session/S36.5
