Scientists use industrial CMOS technology to make silicon-based quantum computers

At present, there are many physical realization methods of quantum computers, among which the advantage of silicon-based quantum computers is that they can use the rich manufacturing experience of the semiconductor industry. Although CMOS (Complementary Metal Oxide Semiconductor) technology is very mature today, there are still very few examples of silicon qubits being produced using industrial CMOS technology.
 
Recently, researchers from the Swiss Federal Institute of Technology Lausanne (EPFL), Hitachi Europe, and the University of Cambridge reported an mk-class low-temperature integrated circuit (IC) fabricated using 40 nm industrial CMOS technology that integrates a silicon-based quantum processor. Three key components: quantum dot (QD) arrays, digital electronics using row-column addressing to minimize control lines, and analog LC resonators for multiplexed readout, all operating at 50 mK at low temperature.
 
Utilizing microwave resonators (6-8 GHz range), they demonstrate dispersive readout of quantum dot charge states and perform combined time- and frequency-domain multiplexing, enabling scalable readout while reducing the overall Chips take up space.
 
Related papers were published in Nature Electronics [1].
 
In low-temperature CMOS chips, quantum dots are located in the channels of the smallest-sized transistors and placed in a 3×3 array. Individual quantum dots can be randomly addressed by digital transistors, using a row-column structure to minimize the number of inputs. Readout is performed using a gate-based microwave reflectometer, a technique that is easily compatible with industrial CMOS technology.
 
This 3x3 array consists of nine identical cells arranged in a row-column random access configuration similar to dynamic random access memory (DRAM). Each cell contains a silicon QD device, denoted Qij, i, j = 1, 2, 3, implemented as a MOS transistor.
 
As shown in the figure below, there are three integrated LC resonators in the low temperature CMOS chip, namely Resonator 1 (blue), Resonator 2 (red) and Resonator 3 (green), as well as access transistors Tij, QD transistors Qij, Word line VWLj, data line VDLi, source voltage VSij, bias tee RT-CT and storage capacitor CC.

                       
                                                                                        Integrated Circuits in this Article
 
The authors say that, in a similar study, their demonstration, for the first time, combines time- and frequency-domain multiplexing to minimize circuit footprint, and additionally, uses one readout resonator per qubit while maintaining a certain degree of parallel readout, ideal for quantum error correction. This method can efficiently read nine qubits simultaneously. 

Andrea Ruffino, PhD student of Professor Edoardo Charbon, who heads the Advanced Quantum Architectures Laboratory (AQUA Lab) at EPFL's School of Engineering, is the first author of the paper. "Our approach is based on using the time and frequency domains, and the basic idea is to reduce the number of connections by having three qubits work with a single bond," he says. His approach can also be extended to larger qubit matrices .
 
Charbon said: "Andrea's demonstration that his method can work on integrated circuits on ordinary computer chips at temperatures close to qubits is a real breakthrough that may advance the integration of large qubit matrix systems with the necessary electronics in Together. These two technologies can work together in a simple, effective and reproducible way."
 
 link:[1] https://www.nature.com/articles/s41928-021-00687-6#data-availability
       [2] https://actu.epfl.ch/news/making-quantum-computers-even-more-powerful/